Technologien für hochintegrierte Ionenfallen für das Quantencomputing/Scalable wafer technologies to fabricate highly integrated ion traps for quantum computing
Dr.-Ing. Steffen Kurth (Fraunhofer Institut for Electronic Nano Systems ENAS)

The ion trap chip is considered to be the heart of quantum computing based on trapped ions. An ideal case is to have available a devices with all sub-components that are necessary for the operation in a small package. First approaches to fabricated integrated miniaturized ion traps are followed by different groups worldwide. Latest directions are to combine multiple registers, that are connected to each other, to use micro optical components such as micro lenses or even photonic integrated circuits for coupling laser radiation to the ions, to integrate photo detectors (e.g. single photon avalanche diodes) close to or within the ion trap chip. The integration of electronic components (e.g. digital/analog-converters) to provide the electric potentials for the trap electrodes is a further goal that becomes an enabler for integrated ion traps with a higher number of registers.

This talk will show how wafer level micro technologies contribute to the above described target. It starts with the vision of an integrated ion trap. Wafer level technologies for fabricating of the different layers are discussed. It covers different material deposition procedures and etching. A next section is about optical sub-components and their manufacturing procedures. Furthermore, a broad variety of assembly technologies and of ways for electric signal routing and connecting is shown with examples.